It sounds like they didn't do a good job of putting the DIMM version in the hands of folks who'd write the drivers just for fun.

The read path is sort of a wash, but writes are still unequalled. NAND writes feel like you're mailing a letter to the floating gate...

Isn't this addressed by newer PCIe standards? Of course, even the "new" Optane media reviewed in OP is stuck on PCIe 4.0...

No; the issue with the DIMMs wasn’t drivers. The issue was that the only people allowed to target the DIMMs directly were the xeon hardware team.

There was a startup doing good work with similar storage chips that were pin (BGA) compatible with standard memory. Not sure what happened to them. That’d be easier to program than xpoint.

As for the new PCIe standard (you probably mean CXL), that’s also basically dead on arrival. The CPU is the power and money bottleneck for the applications it targets, so they provide a synchronous hardware API that stalls the processor pipeline when accessing high-latency devices.

Contrast this to NVMe, which can be set up to either never block the CPU or amortize multiple I/Os per cache miss.

Companies like NVIDIA are already able to maintain massive I/O concurrency over PCIe without CXL, because they have a programming model (the GPU) that supports it. CXL might be a small win for that.

Exactly. I happen to have all AMD sitting around here, and buying my first Optane devices was a gamble, because I had no idea if they'd work. Only reason I ever did, is they got cheap at one point and I could afford the gamble.

That uncertainty couldn't have done the market any favors.

My kingdom for a MicroSD card with Optane inside. My dashcam wants it soooo badly.

For some reason, there was a whole series of brassica oleracea memes going around in 2020 (does that make it a meta-meme? or is that the meme itself, and the images are just instances of the meme?), and they're still wonderful.

Just image-search "brassica memes" at your favorite engine.

And pickup trucks, for some reason.

Slight difference - truck nuts are a crass joke. Comfort nuts are supposed to be a psychological crutch for a dog. The owners actually believe the dog has an issue in the same way that some circumcised humans do.

Thank you!

In the alcove on the right, I think I'm seeing 66-blocks, breaking out the phone lines that must be routed to each machine. Two blocks stacked, each with a fanout of wire on the right side.

My kingdom for a MicroSD card with Optane inside.

You know what they say. Man with one clock, always knows what time it is.

Man with two clocks, never quite sure...

This is my motto (data engineer frequently dealing with "but this source says...")

I've always been cautioned against ultrasonic cleaning of boards that have crystal oscillators, and indeed it's in most XO datasheets.

I've also heard that one shouldn't trim the leads of a through-hole XO before soldering it into the board, since the mechanical shock of the lead breaking can ring the whole package and similarly shake it apart. I'm curious if anyone here has seen that in practice!

> I've also heard that one shouldn't trim the leads of a through-hole XO before soldering it into the board, since the mechanical shock of the lead breaking can ring the whole package and similarly shake it apart. I'm curious if anyone here has seen that in practice!

I’ve never put a through hole crystal into production so I can’t say anything about this conjecture.

However the larger surface mount crystals are not hard to hand solder if you get a package with side wettable flanks and make the pads reasonably large. It’s something I’d recommend considering.

Sometimes, the bigger physical size of through-hole crystals gives them a higher Q. I, too, prefer surface-mount everything but have been defeated on that sadly ;(

I went down this rabbit hole a few years ago, and couldn't find an actionable answer on if this is OK or not. Sounded like "No, you shouldn't", but almost every PCB I've designed (or used?) has at least one, and I know ultrasonic cleaning is a thing, so I'm not sure how to reconcile these.

There is no single answer. It depends on the exact components, their sensitivities, frequencies and energies used, and how much failure risk are you willing to take.

Rule of thumb: one simple xtal per board in small manufacturing runs (4 digits or less) means you're fine.

The larger your manufacturing runs are, and the more sensitive components you have on your boards, the more careful you want to be. Components can easily make the difference between 0.2% failure rate and 2% failure rate, and that 2% failure rate bites when you push units by hundreds of thousands.

Of course, there's always a chance of you getting a perfect match of the exact intensity and frequency used on a given manufacturing line, which you didn't know, with what happens to kill your specific components at a disproportionate rate, which you also didn't know. But it's a pretty low chance. Feeling lucky?

Because yes, it's not actually worth the engineering/support effort for you, your manufacturer and your part vendor to actually put the thinking cap on and characterize all of that shit for a typical low volume run. So luck it is.

I worked on a product that included pre-trimmed HC-49/S through-hole crystal oscillators, and not a single crystal failed. It was a low-volume product, but there were still probably tens too hundreds of thousands of them built.

When a batch with 20 MHz surface-mount crystals, in a package similar to the one in the article, were accidentally run through an ultrasonic cleaner, the failure rate was immediately noticeable, in the single-digit percent.

Leads of through-hole components are usually trimmed before assembly, on both manual and automated assembly lines, (e.g. https://www.youtube.com/watch?v=cjVY8lb0LG8) and I've never seen this prohibited in a datasheet, but ultrasonic cleaning is usually prohibited.

On the other hand I heard that one shouldn't trim leads after soldering as it might crack solder joints...

Depends on the quality of the solder joint. Poor quality solder joints do not survive mechanical shock. If you are fighting a GND pin that sinks a lot of heat, using leadfree solder and you aren't that skilled...don't trim that lead flush with the PCB. Otherwise, if you are sure that the solder has wicked into the hole, trim away.

So if someone is telling you not to trim the lead...I'll let you draw your own conclusion.

This depends how close to the solder joint (or to board) you are trimming. If you're already cutting solder together with the component lead then it's too close and can affect the quality. I'm sure the NASA soldering manuals show this in great detail.

Oh, that's a good one, I can see how that would put a lot of g's on the package. I think this will be a factor depending on the weight of the total assembly. If that weight is significant it will dampen the shockwave.

Paper.

Not even kidding.

With any other media, you have to hope that the drives are still available. Paper routinely lasts hundreds of years and we all have readers built right in.

I like simple solutions. But paper has severe storage capacity limitations, which makes it impractical for storing large amounts of data.

that's one of my AI shower thoughts, an improved version of https://www.ollydbg.de/Paperbak/ s basic idea: write compressed computer data to barcode (1d), QR code (2d), multi-color barcode ('3'd), and so on.

But I keep hoping someone will finish the 'use lasers to burn 5d storage into glass chips' project silica concept and bring it to market so I can have isolinear star trek chips.