I thought custom ASIC's were done when you have some computation that takes many instructions to implement in a CPU, for example for Bitcoin mining your computation might be "Find the sha256 of a fixed-length input and tell me if it begins with at least 32 zeros." The main benefit of using an ASIC (as opposed to an FPGA) is you can hard-wire the circuits, the FPGA has to use generic hardware (super-flexible LUT's and a super-flexible routing fabric) and you pay for all that flexibility with speed, power consumption and area.
I guess the main benefit of the chiplet idea is that you can get a really fast, low-latency connection between the CPU and FPGA? What kinds of problems can be solved with that architecture, that can't be solved by just putting the CPU and FPGA as separate chips on the same circuit board?
Or is it cost and design simplicity, you can have a lot of chiplet elements on the same chip, and the customization is in which chiplets you want ("give me a chip with 4xFPGA and 6xCPU") and how they're connected ("CPU A should be connected to FPGA #4, CPU B should be connected to FPGA #2 and #3")?
ASICs are very diverse with many dimensions and it depends on the definition. Pure ASICs like bitcoin miners are very rare. Most "ASICs" are generally on the programmable platform spectrum (apple socs, snapdragon, versal, ML startup chips, Nvidia, amd versal,...). Take a look at the Apple SoC or Versal Soc of heterogeneous archs with a bunch of different programmable elements integrated.
Also...there is way too much emphasis on compute, most applications are IO/ memory bound. How many memory/serdes channels, total I/O BW, on chip cache sises, what type of I/O is much more important than peak theoretical flops/w.
I guess the main benefit of the chiplet idea is that you can get a really fast, low-latency connection between the CPU and FPGA? What kinds of problems can be solved with that architecture, that can't be solved by just putting the CPU and FPGA as separate chips on the same circuit board?
Or is it cost and design simplicity, you can have a lot of chiplet elements on the same chip, and the customization is in which chiplets you want ("give me a chip with 4xFPGA and 6xCPU") and how they're connected ("CPU A should be connected to FPGA #4, CPU B should be connected to FPGA #2 and #3")?