Very cool I've been waiting for this part of the writeup. A few years ago I tried to write a similar microscope pano stitcher and used SIFT features in opencv, not sure I had come across template matching. I also struggled with blending and never got anything to work. From the blog's comments I want to check out http://abria.github.io/TeraStitcher/ next time I'm looking to do this. Seeing the final stitch results makes me wonder how accurate the census technique can be, especially against an adversary. Could they just layer a dummy chip on top?
The technique looks from the "bottom" side of the chip -- so the imaged elements are mostly "metal 1", e.g. the layer of metal that is directly connected to the transistors. Inserting a dummy layer in between the transistors and metal 1 would be a huge performance and density impact, I don't think it'd be practical.
That being said, the back side power delivery stuff that is currently in the pipe for the sub-"2nm" nodes would block viewing the transistors.
