Tuning feedback loops is a topic I've found to be fiendishly good fun, perhaps because of how obtuse the final result is. There is no at-a-glance way to see the connection between your high-level goals (closed-loop bandwidth and phase margin) and the implementation (the R and C values). Consequently, I make it a point to document the hell out of these circuits with parameterized simulations so that my future self has some hope of understanding and adjusting them later on.
A lot of applications are usually tolerant of suboptimal compensator design. I've participated in a few designs where these circuits were plucked from the datasheet reference design and never touched. There's a tradeoff between having a little bit of ringing vs. having an engineer model, tune, and test, and also adding to the BOM complexity with a bunch of different passive part values.
A lot of applications are usually tolerant of suboptimal compensator design. I've participated in a few designs where these circuits were plucked from the datasheet reference design and never touched. There's a tradeoff between having a little bit of ringing vs. having an engineer model, tune, and test, and also adding to the BOM complexity with a bunch of different passive part values.