I think this must be a standard ARM thing. The nRF51822 Cortex M0 (with BLE) from Nordic can do something very similar.
They call it PPI (Programmable Peripheral Interface). All the peripherals (timers, ports, low power comparator, even a quadrature decoder) have "events" and "tasks" and you can wire them up as you please. It's pretty neat. Doesn't have any op-amps or capacitative sensing circuits though.
What your describing is just configurable IO pin routing and peripherals with DMA. That has been common for decades and has nothing to do with ARM, nor is it at all related to Cypress's PSoCs.
The PSoC has an internal switch fabric as well. You aren't just muxxing various blocks to certain pins (e.g. Pin 2.1 is either GPIO, SPI CLK, or UART TX), you can wire blocks to each other internally and then send the output or input to a large choice of pins on the outside.
They call it PPI (Programmable Peripheral Interface). All the peripherals (timers, ports, low power comparator, even a quadrature decoder) have "events" and "tasks" and you can wire them up as you please. It's pretty neat. Doesn't have any op-amps or capacitative sensing circuits though.