I would guess that the interesting comparison isn't this vs. alternate FPGA approaches, but this vs. alternate OpenCL targets (GPUs, especially). For people that already have OpenCL written to solve their problem, they're going to want to know if the performance will be better per unit cost as compared to whatever they're running it on now, and it sounds like at least in some cases the FPGAs will do better than GPUs, so it's still a net win even if you could do it even faster by writing Verilog.

Obviously it won't work for every problem, but the problem classes you mention being a poor fit (state machines, etc.), nobody is using OpenCL for anyway... super-branchy code like state machines performs badly on GPUs, which are currently the main OpenCL targets.