Intel, at the time the unquestioned world leader in semiconductor fabrication was so unable to accurately predict the end of Dennard scaling that they rolled out the Pentium 4. "10Ghz by 2010!" was something they predicted publicly in earnest!
I arguably owe a successful career in tech to my dad seeing a $99 deal on a TI-99 after they were discontinued in the mid 80's and buying it just because he had had a shortwave receiver as a child and saw some weird similarity. Unbeknownst to him, it turned out my mother had been a FORTRAN programmer in the 70's (though she described it as working as a lab-tech in a bio lab), and taught me how to program it in its weird BASIC dialect.
I've never understood why Intel didn't just soft-disable AVX512 on P-cores until the OS writes a value to some MSR that means "I understand that only some cores have AVX512".
From the OS side, the change to support it is pretty simple. On the first #UD trap caused by an AVX512 instruction being missing, pin the process to just the P-cores and end the process's timeslice.
It comes with a dedicated remote (though it does support CEC), which solves #1, at the cost of having an extra remote.
I mainly hit #2 when scrubbing, often (worse on some compression types than others), it'll just freeze frame for a minute before everything catches up. This may be because I'm serving the content via HTTP to the Vera V, I've been meaning to try NFS and/or SMB. Never had issues with playback itself, probably because the Vera V hardware and the OSMC/Kodi build are co-developed, so there is pretty much always hardware decode support.
#3 surprised me; Kodi supporting just using my directory layout is why I use it over something like Jellyfin! I just added the HTTP share, and then navigate Videos->files->my_http_share_name and I'm in my directory structure.
Most of the Intel cache partitioning things were driven primarily by Google. The holy grail was to colocate latency-sensitive tasks with bulk background tasks to increase cluster utilization.
I guess technically CAT and RDT are not ISA extensions because they are managed by MSRs. I was thinking of aspects of BMI, but I am sure that large-scale buyers had input into things like vector extensions, PMU features, and the things you mentioned as well.
Early in my career in the mid 2000s, the startup that was on the same floor as mine laid off a QA person, who then showed up the next day and fatally shot the CEO and head of HR. Our CEO called me and told me not to come in that day.
> How do these guys get the data in order and we dont?
LAGs stripe traffic across links at the packet level, whereas QSFP/OSFP lanes do so at the bit level.
Different sized packets on different LAG links will take different amounts of time to transmit. So when striping bits, you effectively have a single ordered queue, whereas when striping packets across links, there are multiple independent queues.
Intel, at the time the unquestioned world leader in semiconductor fabrication was so unable to accurately predict the end of Dennard scaling that they rolled out the Pentium 4. "10Ghz by 2010!" was something they predicted publicly in earnest!
It, uhhh, didn't quite work out that way.
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